Part Number Hot Search : 
XC2VP100 F1007 2A120 ES1PD S1501 PD075 BSP42 AN2050
Product Description
Full Text Search
 

To Download S1C17001 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  S1C17001 seiko epson corporation cmos 16-bit single chip microcontroller the S1C17001 is a 16-bit mcu that features high-speed operation, low power consumption, small size, large address space, and on-chip ice. the S1C17001 consists of an s1c17 cpu core, a 32k-byte rom, a 2k-byte ram, serial interface modules (uart that supports high bit rate and irda 1.0, spi and i 2 c) for connecting various sensor modules, 8-bit timers, 16-bit timers, a pwm & capture timer, a clock timer, a stopwatch timer, a watchdog timer and 28 gpio ports. the S1C17001 is capable of high-speed operation (8.2 mhz) with low operating voltage (1.8 v). its 16-bit risc processor executes one instruction in one clock cycle. the S1C17001 also provides an on-chip ice function that allows on-board debugging and evaluating the program by connecting the S1C17001 to the icd mini (s5u1c17001h) or icd board with only three wires. features cpu ................................................. ? seiko epson original 16-bit risc cpu core s1c17 main (osc3) oscillator .................. ? crystal/ceramic oscillator or external clock input 8.2 mhz (max.) sub (osc1) oscillator.................... ? crystal oscillator or external clock input 32.768 khz (typ.) on-chip rom.................................. ? 32k bytes on-chip ram .................................. ? 2k bytes i/o ports ......................................... ? max. 28 general-purpose i/o ports (pins are shared with the peripheral i/o.) serial interfaces ............................. ? spi (master/slave) 1 ch. ? i 2 c (master) 1 ch. ? uart (with irda 1.0) 1 ch. ? remote controller (remc) 1 ch. timers ............................................. ? 8-bit timer (t8f) 1 ch. ? 16-bit timer (t16) 3 ch. ? pwm & capture timer (t16e) 1 ch. ? clock timer (ct) 1 ch. ? stopwatch timer (swt) 1 ch. ? watchdog timer (wdt) 1 ch. ? 8-bit osc1 timer (t8osc1) 1 ch. interrupts ........................................ ? reset ? nmi ? 14 hardware interrupts (8 levels) power supply voltage .................... ? core voltage (lv dd ) 1.65 v to 2.7 v ? i/o voltage (hv dd ) 1.65 v to 3.6 v operating temperature .................. ? -40c to 85c current consumption (typ.) ........... ? sleep state: 0.5 a ? halt state: 2.5 a (32 khz) ? run state: 10 a (32 khz) 1800 a (8 mhz) shipping form ................................. ? wcsp- 48pin plastic package flash memory model for developing mask rom code......... ? s1c1 7704
S1C17001 2 epson block diagram cpu core s1c17 internal ram (2k bytes) 8-bit timer 16-bit timer prescaler clock timer watchdog timer remote controller misc register internal rom (32k bytes) interrupt system dclk, dst2, dsio(p31?3) remi(p04), remo(p05) p00?7, p10?7, p20?7, p30?3 excl0? (p16, p07, p06) sin, sout, sclk (p23?5) sdi, sdo, spiclk (p20?2) i/o 2 (0x5000? interrupt controller uart spi i 2 c sda, scl (p14?5) i/o 1 (0x4000? i/o port/ i/o mux #test0? reset circuit test circuit #reset oscillator/ clock generator stopwatch timer pwm & capture timer 8-bit osc1 timer osc1?, osc3? fout1(p13), fout3(p30) excl3(p27), tout(p26)
S1C17001 epson 3 pin layout diagram wcsp-48pin a b c d e f g a b c d e f g 7654321 1234567 a1 corner a1 corner index top view top view bottom view p07 excl1 a b c d e f g 1 p05 remo #test2 p06 excl2 p15 scl p16 excl0 lv dd lv dd dsio p33 dst2 p32 #test0 p17 #spiss #test1 p21 sdo v ss v ss v ss v ss v ss p04 remi dclk p31 p14 sda p20 sdi hv dd hv dd p02 p03 p01 p00 p22 spiclk p23 sin p24 sout p12 p10 p13 fout1 p25 sclk osc4 p11 #reset p27 excl3 #test4 osc3 #test3 p26 tout p30 fout3 osc1 osc2 #test5 234567
S1C17001 4 epson pin description no. pin name i/o initial function 1 v ss C C power supply pin (gnd) 2 #test1 i i (pull-up) test pin (fix at high during normal operation) 3 #test2 i i (pull-up) test pin (fix at high during normal operation) 4 #test3 i i (pull-up) test pin (fix at high during normal operation) 5 #test4 i i (pull-up) test pin (fix at high during normal operation) 6 #test5 i i (pull-up) test pin (fix at high during normal operation) 7 osc3 i i osc3 oscillation input pin (external clock may be input) 8 osc4 o o osc3 oscillation output pin 9 osc1 i i osc1 oscillation input pin (external clock may be input) 10 osc2 o o osc1 oscillation output pin 11 hv dd C C power supply pin (hv dd +) 12 v ss C C power supply pin (gnd) 13 #test0 i i (pull-up) test pin (fix at high during normal operation) 14 #reset i i (pull-up) initial reset input pin 15 dsio /p33 i/o i (pull-up) on-chip debugger data i/o pin * or i/o port pin 16 dst2 /p32 i/o o (l) on-chip debugger status output pin * or i/o port pin 17 dclk /p31 i/o o (h) on-chip debugger clock output pin * or i/o port pin 18 p30 /fout3 i/o i (pull-up) i/o port pin * or osc3 divider clock output pin 19 p27 /excl3 i/o i (pull-up) i/o port pin * or t16e external clock input pin 20 p26 /tout i/o i (pull-up) i/o port pin * or t16e pwm signal output pin 21 p25 /sclk i/o i (pull-up) i/o port pin * or uart clock input pin 22 p24 /sout i/o i (pull-up) i/o port pin * or uart data output pin 23 p23 /sin i/o i (pull-up) i/o port pin * or uart data input pin 24 p22 /spiclk i/o i (pull-up) i/o port pin * or spi clock i/o pin 25 p21 /sdo i/o i (pull-up) i/o port pin * or spi data output pin 26 p20 /sdi i/o i (pull-up) i/o port pin * or spi data input pin 27 p17 /#spiss i/o i (pull-up) i/o port pin (with interrupt) * or spi slave select input pin 28 p16 /excl0 i/o i (pull-up) i/o port pin (with interrupt) * or t16 ch.0 external clock input pin 29 p15 /scl i/o i (pull-up) i/o port pin (with interrupt) * or i 2 c clock output pin 30 p14 /sda i/o i (pull-up) i/o port pin (with interrupt) * or i 2 c data i/o pin 31 p13 /fout1 i/o i (pull-up) i/o port pin (with interrupt) * or osc1 clock output pin 32 p12 i/o i (pull-up) i/o port pin (with interrupt) 33 p11 i/o i (pull-up) i/o port pin (with interrupt) 34 p10 i/o i (pull-up) i/o port pin (with interrupt) 35 p07 /excl1 i/o i (pull-up) i/o port pin (with interrupt) * or t16 ch.1 external clock input pin 36 p06 /excl2 i/o i (pull-up) i/o port pin (with interrupt) * or t16 ch.2 external clock input pin 37 p05 /remo i/o i (pull-up) i/o port pin (with interrupt) * or remote control signal output pin 38 p04 /remi i/o i (pull-up) i/o port pin (with interrupt) * or remote control signal input pin 39 p03 i/o i (pull-up) i/o port pin (with interrupt) 40 hv dd C C power supply pin (hv dd +) 41 v ss C C power supply pin (gnd) 42 p02 i/o i (pull-up) i/o port pin (with interrupt) 43 p01 i/o i (pull-up) i/o port pin (with interrupt) 44 p00 i/o i (pull-up) i/o port pin (with interrupt) 45 lv dd C C power supply pin (lv dd +) 46 v ss C C power supply pin (gnd) 47 lv dd C C power supply pin (lv dd +) 48 v ss C C power supply pin (gnd) note: the pin names described in boldface type and description with * are default settings.
S1C17001 epson 5 basic external connection diagram single power supply system (lv dd = hv dd ) p00~p03 p04 (remi) p05 (remo) p06 (excl2) p07 (excl1) p10~p12 p13 (fout1) p14 (sda) p15 (scl) p16 (excl0) p17 (#spiss) p20 (sdi) p21 (sdo) p22 (spiclk) p23 (sin) p24 (sout) p25 (sclk) p26 (tout) p27 (excl3) p30 (fout3) dsio (p33) dclk (p31) dst2 (p32) recommended values for external parts S1C17001 [the potential of the substrate (back of the chip) is v ss .] lv dd hv dd #test1?test5 #reset osc3 osc4 osc1 osc2 test0 v ss icd or i/o i/o hv dd 10k symbol x'tal1 c g1 c d1 rf 1 rd 1 x'tal3 ce c g3 c d3 rf 3 rd 3 c p cres name crystal oscillator gate capacitor drain capacitor feedback resistor drain resistor crystal oscillator ceramic oscillator gate capacitor drain capacitor feedback resistor drain resistor capacitor for power supply capacitor for #reset pin recommended value 32.768 khz (mc-146, epson toyocom) 7 pf 7 pf 10 m 0 8 mhz (ca-301, epson toyocom) 0.2? mhz 27 pf 27 pf 1 m 0 3.3 f 0.47 f rd 3 rd 1 c d3 x'tal3 or ce rf 3 c g3 c d1 x'tal1 rf 1 c g1 cres 1.65 v | 2.7 v c p + - note: the above table is simply an example, and is not guaranteed to work.
http://www.epson.jp/device/semicon_e S1C17001 notice: no part of this material may be reproduced or duplicated in any form or by any means without the written permission of seiko ep son. seiko epson reserves the right to make changes to this material without notice. seiko epson does not assume any liability of any kind arisi ng out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no re presentation that this material is applicable to products requiring high level reliability, such as, medical products. moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material wil l be free from any patent or copyright infringement of a third party. this material or portions thereof may contain technology or the subject rela ting to strategic products under the control of the foreign exchange and foreign trade law of japan and may require an export license from the ministry of economy, trade and industry or other approval from another government agency. ? seiko epson corporation 2008, all right reserved. seiko epson corporation epson electronic devices website semiconductor operations div ision ic sales dept. ic international sales group document code: 411207701 421-8, hino, hino-shi, tokyo 191-8501, japan first issue september, 2007 phone: +81-42-587-5814 fax: +81-42-587-5117 printed april, 2008 in japan l dual-power supply system (lv dd hv dd ) p00~p03 p04 (remi) p05 (remo) p06 (excl2) p07 (excl1) p10~p12 p13 (fout1) p14 (sda) p15 (scl) p16 (excl0) p17 (#spiss) p20 (sdi) p21 (sdo) p22 (spiclk) p23 (sin) p24 (sout) p25 (sclk) p26 (tout) p27 (excl3) p30 (fout3) dsio (p33) dclk (p31) dst2 (p32) S1C17001 [the potential of the substrate (back of the chip) is v ss .] hv dd #test1?test5 lv dd #reset osc3 osc4 osc1 osc2 test0 v ss icd or i/o i/o hv dd 10k cres 3.3 v c ph + - 1.8 v c pl + - rd 3 rd 1 c d3 x'tal3 or ce rf 3 c g3 c d1 x'tal1 rf 1 c g1 recommended values for external parts symbol x'tal1 c g1 c d1 rf 1 rd 1 x'tal3 ce c g3 c d3 rf 3 rd 3 c p cres name crystal oscillator gate capacitor drain capacitor feedback resistor drain resistor crystal oscillator ceramic oscillator gate capacitor drain capacitor feedback resistor drain resistor capacitor for power supply capacitor for #reset pin recommended value 32.768 khz (mc-146, epson toyocom) 7 pf 7 pf 10 m 0 8 mhz (ca-301, epson toyocom) 0.2? mhz 27 pf 27 pf 1 m 0 3.3 f 0.47 f note: the above table is simply an example, and is not guaranteed to work.


▲Up To Search▲   

 
Price & Availability of S1C17001

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X